HP SMP architectures

Hewlett-Packard offers single-processor and symmetric multiprocessor (SMP) systems. This book focuses on SMP systems, specifically, those that utilize different bus configurations for memory access. These are briefly described in the following sections, and in more detail in the Chapter 2 “Architecture overview”.

Bus-based systems

The K-Class servers are midrange servers with a bus-based architecture. It contains one set of processors and physical memory. Memory is shared among all the processors, with a bus serving as the interconnect. The shared-memory architecture has a uniform access time from each processor.

Hyperplane Interconnect systems

The V-Class servers configurations range from one to 16 processors on the V-Class single-node system. These systems have the following characteristics:

Processors communicate with each other through memory and by using I/O devices through a Hyperplane Interconnect nonblocking crossbar.

Scalable physical memory. The current V-Class server support up to 16 Gbytes of memory.

Each process on an HP system can access a 16-terabyte (Tbyte) virtual address space.

HP SMP architectures

Technical documentation

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» Glossary

Bus-based systems

Hyperplane Interconnect systems